The present invention relates to the control of magnetic storage systems for digital computers, and more particularly, to integrated circuits used for the analog to digital conversion of low frequency auxiliary signals used to control magnetic storage systems.
In magnetic disk storage systems for computers, such as hard disk drives, digital data serves to modulate the current in a read/write head coil so that a sequence of corresponding magnetic flux transitions are written onto a magnetic medium in concentric tracks. To read this recorded data, the read/write head passes over the magnetic medium and transduces the magnetic transmissions into pulses and an analog signal that alternates in polarity. These pulses are then decoded by read channel circuitry to reproduce the digital data.
Decoding the pulses into a digital sequence can be performed by a simple peak detector in a conventional analog read channel or, as in more recent designs, by using a discrete time sequence detector in a sampled amplitude read channel. Discrete time sequence detectors are preferred over simple analog pulse detectors because they compensate for intersymbol interference (ISI) and, therefore, are less susceptible to noise. As a result, discrete time sequence detectors increase the capacity and reliability of the storage system.
There are several well known discrete time sequence detection methods for use in a sampled amplitude read channel circuit including discrete time pulse detection (DPD), partial response (PR) with Viterbi detection, partial response maximum likelihood (PRML) sequence detection, decision-feedback equalization (DFE), enhanced decision-feedback equalization (EDFE), and fixed-delay tree-search with decision-feedback (FDTS/DF).
No matter what type of discrete methods are utilized for sampled amplitude read channel systems, an analog to digital converter (ADC) is typically utilized to convert the high frequency data which is contained on the disk. For example, the high frequency user data from a disk is often converted with a six-bit ADC. Other high frequency information which is contained on the disk, such as servo information, may also be detected and processed with the same ADC as utilized to convert user data from the disk. For example, co-pending U.S. application Ser. No. 08/440,515 filed May 8, 1995, now U.S. Pat. No. 5,796,535 discusses the use of a common ADC to convert both user data and servo data (collectively "disk data"). Typically such high frequency data is at frequencies of 50 MHz or higher, and more particularly of 100 MHz or higher.
Generally, in addition to data contained on the disk, disk drive systems also require the monitoring and use of various non-disk low frequency signals. Such low frequency signals may be called non-disk or auxiliary signals and include signals that indicate motor back-EMF current or other disk drive control signals for example. Typically, such auxiliary signals are analog signals which require conversion into digital signals for use in controlling and operating the disk drive system. Generally, such conversion is done through an additional ADC which is external to (i.e., not within) the read channel circuitry. Furthermore, the auxiliary control signals often require an ADC having a higher bit accuracy than the ADC which is utilized for the high frequency disk data. Typically the low frequency auxiliary control data is at frequencies of 100 KHz or lower, more particularly lower than 10 KHz, and for example 3 KHz as used with motor back-emf signals.
A block diagram of a typical prior art system showing the use of multiple ADC's is shown in FIG. 1. As shown in FIG. 1, high frequency disk data, such as user data and servo data, is presented at an input 10. The input 10 provides data to a read channel circuitry 30. Within the read channel circuitry 30 an ADC 40 is utilized. The digital version of the analog data from input 10 is provided at an output 20. It will be recognized by those skilled in the art that the digital data at output 20 may then be used and process by other portions of a typical read channel circuit (not shown). Independent of the read channel circuitry 30, auxiliary conversion circuitry 70 is also utilized in the prior art. In such prior art uses, the auxiliary conversion circuitry 70 is external to the read channel circuitry 30. Auxiliary data, for example low frequency motor back-EMF current data, is presented at auxiliary data input 50. Through the use of an ADC 80 within the auxiliary conversion circuitry 70, a digital form of the analog data presented at input 50 is provided at output 60.
Within the prior art, the ADC utilized in the read channel circuitry generally has a lower precision than the ADC utilized in the auxiliary conversion circuitry. For example the ADC 40 in the read channel circuitry 30 typically has six bit accuracy while the auxiliary conversion ADC typically requires 8 to 10 bit accuracy. The use of two separate ADC circuits adds complexity, circuit size and circuit costs to the control electronics for disk drive systems. However, the prior art utilization of two separate ADC's has been required as a result of the significantly different uses and specifications of each ADC. For example, ADC 40 utilized in the read channel receives relatively high frequency data and uses a relatively low precision circuitry while ADC 80 receives relatively low frequency data and requires relatively high precision ADC circuitry. It would be desirable to reduce the disk drive circuitry complexity, size, and costs of the ADC methods utilized in the prior art disk drive systems.